Generally, a semiconductor integrated circuit (IC) is formed on multiple layers of a semiconductor substrate (or a semiconductor wafer). In order to properly fabricate a semiconductor integrated circuit, some layers of the substrate need to be aligned with each other. In such cases, a metrology target (or alignment mark) formed in a semiconductor substrate is utilized to perform the overlay (or alignment) measurements.
The metrology target may include a plurality of gratings, and an overlay shift between different layers of the semiconductor substrate can be measured based on the arrangement of the gratings.
Although existing metrology targets have generally been adequate for their intended purposes, they have not been entirely satisfactory in all respects. Consequently, there is a need for a metrology target and manufacturing method thereof that provides a solution for the overlay-shift measurement.